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2021-09-24 Microchip CAN bus related information

  • Study the Microchip CAN Bus related topic, memo it to prevent can not find later.

Memo

  • ECAN 系列參考
  • dsPIC33EP256MU806 CAN Bus example Tx Code from Datasheet DS70353C
  • CAN Flexible Data-Rate (FD) Protocol Module
  • AN1249 ECAN™ Operation with DMA on dsPIC33F and PIC24H Devices
  • ACONDICIONAMIENTO Y PROCESADO DE SEÑALES MEDIANTE BUS CAN EN VEHÍCULOS MONOPLAZA
    • https://oa.upm.es/13974/1/PFC_EDUARDO_MAYORAL_RUIZ.pdf
    • Refer page 138 for CAN Initialization
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      /******************************************************************************
      * Function: initCAN
      * Description: Initialises the ECAN module
      * Arguments: none
      ******************************************************************************/
      void initECAN (void)
      {
        unsigned long temp;
        unsigned int tempint;
        /* put the module in configuration mode */
        C1CTRL1bits.REQOP=4;
        while(C1CTRL1bits.OPMODE != 4);
        /* FCAN is selected to be FCY
          FCAN = FCY = 40MHz */
          C1CTRL1bits.CANCKS = 0x1;
        /*
        Bit Time = (Sync Segment + Propagation Delay + Phase Segment 1 + Phase Segment 2)=20*TQ
        Phase Segment 1 = 8TQ
        Phase Segment 2 = 6Tq
        Propagation Delay = 5Tq
        Sync Segment = 1TQ
        CiCFG1<BRP> =(FCAN /(2 ×N×FBAUD))– 1
        BIT RATE OF 1Mbps
        */
        C1CFG1bits.BRP = BRP_VAL;
        /* Synchronization Jump Width set to 4 TQ */
        C1CFG1bits.SJW = 0x3;
        /* Phase Segment 1 time is 8 TQ */
        C1CFG2bits.SEG1PH=0x7;
        /* Phase Segment 2 time is set to be programmable */
        C1CFG2bits.SEG2PHTS = 0x1;
        /* Phase Segment 2 time is 6 TQ */
        C1CFG2bits.SEG2PH = 0x5;
        /* Propagation Segment time is 5 TQ */
        C1CFG2bits.PRSEG = 0x4;
        /* Bus line is sampled three times at the sample point */
        C1CFG2bits.SAM = 0x1;
        /* 4 CAN Messages to be buffered in DMA RAM */
        C1FCTRLbits.DMABS=0b000;
        /* Filter configuration */
        /* enable window to access the filter configuration registers */
        C1CTRL1bits.WIN=0b1;
        /* select acceptance mask 0 filter 0 buffer 1 */
        C1FMSKSEL1bits.F0MSK=0;
        /* configure accpetence mask 0 - match the id in filter 0
        setup the mask to check every bit of the standard message,
        the macro when called as CAN_FILTERMASK2REG_SID(0x7FF) will
        write the register C1RXM0SID to include every bit in filter comparison
        */
        C1RXM0SID=CAN_FILTERMASK2REG_SID(0x7FF);
        /* configure accpetence filter 0
        setup the filter to accept a standard id of 0x123,
        the macro when called as CAN_FILTERMASK2REG_SID(0x123) will
        write the register C1RXF0SID to accept only standard id of 0x123
        */
        C1RXF0SID=CAN_FILTERMASK2REG_SID(0x123);
        /* set filter to check for standard ID and accept standard id only */
        C1RXM0SID=CAN_SETMIDE(C1RXM0SID);
        C1RXF0SID=CAN_FILTERSTD(C1RXF0SID);
        /* acceptance filter to use buffer 1 for incoming messages */
        C1BUFPNT1bits.F0BP=0b0001;
        /* enable filter 0 */
        C1FEN1bits.FLTEN0=1;
        /* select acceptance mask 1 filter 1 and buffer 2 */
        C1FMSKSEL1bits.F1MSK=0b01;
        /* configure accpetence mask 1 - match id in filter 1
        setup the mask to check every bit of the extended message,
        the macro when called as CAN_FILTERMASK2REG_EID0(0xFFFF)
        will write the register C1RXM1EID to include extended
        message id bits EID0 to EID15 in filter comparison.
        the macro when called as CAN_FILTERMASK2REG_EID1(0x1FFF)
        will write the register C1RXM1SID to include extended
        message id bits EID16 to EID28 in filter comparison.
        */
        C1RXM1EID=CAN_FILTERMASK2REG_EID0(0xFFFF);
        C1RXM1SID=CAN_FILTERMASK2REG_EID1(0x1FFF);
        /* configure acceptance filter 1
        configure accpetence filter 1 - accept only XTD ID 0x12345678
        setup the filter to accept only extended message 0x12345678,
        the macro when called as CAN_FILTERMASK2REG_EID0(0x5678)
        will write the register C1RXF1EID to include extended
        message id bits EID0 to EID15 when doing filter comparison.
        the macro when called as CAN_FILTERMASK2REG_EID1(0x1234)
        will write the register C1RXF1SID to include extended
        message id bits EID16 to EID28 when doing filter comparison.
        */
        C1RXF1EID=CAN_FILTERMASK2REG_EID0(0x5678);
        C1RXF1SID=CAN_FILTERMASK2REG_EID1(0x1234);
        /* filter to check for extended ID only */
        C1RXM1SID=CAN_SETMIDE(C1RXM1SID);
        C1RXF1SID=CAN_FILTERXTD(C1RXF1SID);
        /* acceptance filter to use buffer 2 for incoming messages */
        C1BUFPNT1bits.F1BP=0b0010;
        /* enable filter 1 */
        C1FEN1bits.FLTEN1=1;
        /* select acceptance mask 1 filter 2 and buffer 3 */
        C1FMSKSEL1bits.F2MSK=0b01;
        /* configure acceptance filter 2
        configure accpetence filter 2 - accept only XTD ID 0x12345679
        setup the filter to accept only extended message 0x12345679,
        the macro when called as CAN_FILTERMASK2REG_EID0(0x5679)
        will write the register C1RXF1EID to include extended
        message id bits EID0 to EID15 when doing filter comparison.
        the macro when called as CAN_FILTERMASK2REG_EID1(0x1234)
        will write the register C1RXF1SID to include extended
        message id bits EID16 to EID28 when doing filter comparison.
        */
        C1RXF2EID=CAN_FILTERMASK2REG_EID0(0x5679);
        C1RXF2SID=CAN_FILTERMASK2REG_EID1(0x1234);
        /* filter to check for extended ID only */
        C1RXF2SID=CAN_FILTERXTD(C1RXF2SID);
        /* acceptance filter to use buffer 3 for incoming messages */
        C1BUFPNT1bits.F2BP=0b0011;
        /* enable filter 2 */
        C1FEN1bits.FLTEN2=1;
       
        /* clear window bit to access ECAN control registers */
        C1CTRL1bits.WIN=0;
        /* put the module in normal mode */
        C1CTRL1bits.REQOP=0;
        while(C1CTRL1bits.OPMODE != 0);
        /* clear the buffer and overflow flags */
        C1RXFUL1=C1RXFUL2=C1RXOVF1=C1RXOVF2=0x0000;
        /* ECAN1, Buffer 0 is a Transmit Buffer */
        C1TR01CONbits.TXEN0=1;
        /* ECAN1, Buffer 1 is a Receive Buffer */
        C1TR01CONbits.TXEN1=0;
        /* ECAN1, Buffer 2 is a Receive Buffer */
        C1TR23CONbits.TXEN2=0;
        /* ECAN1, Buffer 3 is a Receive Buffer */
        C1TR23CONbits.TXEN3=0;
        /* Message Buffer 0 Priority Level */
        C1TR01CONbits.TX0PRI=0b11;
        /* configure the device to interrupt on the receive buffer full flag */
        /* clear the buffer full flags */
        C1RXFUL1=0;
        C1INTFbits.RBIF=0;
      }

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blog/2021-09-24_microchip_can_bus_related_information.txt · Last modified: 2021/09/24 16:00 (external edit)

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