Source: https://beyond-firmware.blogspot.com/2015/12/smbus.html

X86架構下要access SMBus device，可以透過 SMBus Controller (D31:F3)的IO Base address ,Intel定義這個IO位置在PCI configuration space的0x20~0x23

從0x20~0x23得到SMBus IO Base address後，主要是操作下列0~7 offset IO registers就可以完成Byte/Word/Block command的R/W

每個SMBus上的device都有一個獨特的slave address, 下兩張圖用TI的SMBus voltage sensor IC當範例，他使用A0跟A1去決定他在SMBus上的address，假如A1接Low, A0接Low, 那他的address就是1Dh, 如果用下面的範例程式來控制這顆IC，那DevAddr就要傳進1Dh

示範read byte command， code 如下:

   BYTE Read_SMBus_Byte(DWORD DevAddr, BYTE Index)
   {
     outp(wSMIOBase,0xDE);            // clear status bits
       
     outp(wSMIOBase+4, (DevAddr<<1) | 1 ); //device address, bit 0 set 1 means read
     DELAY;
   
     outp(wSMIOBase+3, Index );   // index to read
     DELAY;
     outp(wSMIOBase+2, 0x48 );    // Host control: byte read & set start bit
     DELAY;
     while ( inp(wSMIOBase) & BIT0 ); // Check if is busy?
     DELAY;
     if ( (inp(wSMIOBase) & 0x1C) == 0 )    //BIT2, BIT3, BIT4 用來報錯 
         return inp(wSMIOBase+5);  // get host byte data
   
     return FAIL;
   }      

Back

12 person(s) visited this page until now.

Back